Several ASICs support the APV readout chip in the front-end.
In the readout path, the APVMUX is used to multiplex the output of two
APV25 chips onto a single transmission channel. On the control and monitoring
side [54],
the PLL-Delay splits clock and trigger signals from a common
line and is used to fine-tune clock and trigger delay. The DCU monitors voltages, currents and temperature.
Finally, the CCU is responsible for the communication with the control room and acts as an
bus master. Since FEC and CCU are a logical unit, they will be discussed together in a later section.